STM32のポートアクセス

最終更新日 2020年3月25日

dannyelectronicsという会社がSTM32F1ボードでデジタルポートをアクセスする際の実行速度を比較するレポートを公開されています。興味深い内容です。

https://dannyelectronics.wordpress.com/2016/04/30/the-price-of-stm32-arduino/

Arduinoライクに digitalWrite() でアクセスするのと レジスタに直接アクセスするのでは 19.3倍差があるという物です。テストコードを掲載しておきます。50回実行して比較していますが、Loop文を使用していません。Loop文を用いても変わらないと思うのですが。

//test for arduino port execution speed
//test routines - only one can be defined at a given time to test individual routines
//#define ARDUINO_0 //use arduino port routines
#define ARDUINO_1                             //direct port access. use |/& operators
//#define ARDUINO_2                             //direct port access. use ^ operator
//#define ARDUINO_3                             //direct port access. use BSRR/BRR registers
//#define DisableInterrupts //disable interrupts
//hardware configuration
#define LED PC13                                //led output pin
void setup() {
        // put your setup code here, to run once:
        pinMode(LED, OUTPUT);
#if defined(DisableInterrupts)
        noInterrupts();                         //disable interrupts
#endif
}
void loop() {
        // put your main code here, to run repeatedly:
        //flip pins here - hard-wired iterations x 50
#if defined(ARDUINO_0)
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
        digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
#elif defined(ARDUINO_1)
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
        GPIOC->regs->ODR |= (1<<13); GPIOC->regs->ODR &=~(1<<13);       //approach 1
#elif defined(ARDUINO_2)
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
        GPIOC->regs->ODR ^= (1<<13); GPIOC->regs->ODR ^= (1<<13);       //approach 2
#elif defined(ARDUINO_3)
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
        GPIOC->regs->BSRR = (1<<13); GPIOC->regs->BRR = (1<<13);        //approach 3
#else
#warning "no approach defined!!!!"
#endif
}

実際に実行してみましたが、このままでは数値表示しないのでレタッチする必要があります。ForLoop文に変更します。また、STM32MINIShield基板のLED1を出力pinに変更します。50回ではシリアル書き込み時間が問題になりますので1000回に変更しました。

/*
 * 20200325 T.Wanibe デジタルPinアクセス方法の処理時間を比較検証します。
 * Arduinoでも判っていたことですが digitalWrite()の記述はわかりやすいのですが
 * オーバヘッドが大きく問題がありました。レジスタによるアクセスで16倍ほど速くなると云う
 * 経験をしていましたがBluePillではもっと顕著だという事が判ります。
 * 結果ですが
 * ARDUINO_0 の場合 1375usec
 * ARDUINO_1 の場合 295usec
 * ARDUINO_2 の場合 295usec
 * ARDUINO_3 の場合 127usec
 * でした。10倍強早くなります。重要な情報です。
 * 最大131072バイトのフラッシュメモリのうち、スケッチが14860バイト(11%)を使っています。
 * 最大20480バイトのRAMのうち、グローバル変数が3128バイト(15%)を使っていて、ローカル変数で17352バイト使うことができます。
 */
//test for arduino port execution speed
//test routines - only one can be defined at a given time to test individual routines
//#define ARDUINO_0                               //use arduino port routines
//#define ARDUINO_1                             //direct port access. use |/& operators
//#define ARDUINO_2                             //direct port access. use ^ operator
#define ARDUINO_3                             //direct port access. use BSRR/BRR registers
//#define DisableInterrupts                     //disable interrupts
//hardware configuration
#define LED     PB8                             //led output pin
void setup() {
        Serial.begin(115200);                   //シリアル通信を開ます。
        delay(1000);
        // put your setup code here, to run once:
        pinMode(LED, OUTPUT);
#if defined(DisableInterrupts)
        noInterrupts();                         //disable interrupts
#endif
}
void loop() {
        // put your main code here, to run repeatedly:
        //flip pins here - hard-wired iterations x 50
        int start = micros();
        for(int i = 0; i < 1000; i++){
#if defined(ARDUINO_0)
                digitalWrite(LED, HIGH); digitalWrite(LED, LOW);
#elif defined(ARDUINO_1)
                GPIOB->regs->ODR |= (1<<8); GPIOB->regs->ODR &=~(1<<8); //approach 1
#elif defined(ARDUINO_2)
                GPIOB->regs->ODR ^= (1<<8); GPIOB->regs->ODR ^= (1<<8); //approach 2
#elif defined(ARDUINO_3)
                GPIOB->regs->BSRR = (1<<8); GPIOB->regs->BRR = (1<<8);  //approach 3
#else
#warning "no approach defined!!!!"
#endif
        }
        Serial.print(micros() - start);Serial.println(F("[usec]"));
}

結果は10倍強です。興味深い結果でした。


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